Dynamic properties of asymmetric discrete vortex-flow transistors

The dynamic properties of discrete vortex-flow transistors (DVFTs) comprised of a parallel array of ten Josephson junctions with asymmetric bias-current configurations have been studied numerically. Using parameters typical of high-temperature superconductor junctions at liquid-nitrogen temperatures, we show explicitly that the asymmetric-inline geometry, while it has the advantage of large (low-frequency) current gain (of order 50) and peak transresistance (of order 10 ), is inherently limited by slow vortex transit times (of order 100 ps) which result from the absence of Lorentz forces on vortices moving in the structure. We also explain the extremely small dynamic range of the high-gain regime seen in the simulations here and observed experimentally in the literature. As the device symmetry is increased, faster transit times and a significant increase in dynamic range are observed. These results have direct impact on the feasibility of these devices as high-frequency amplifiers.