A new method for steady-state analysis of pulsewidth modulation (PWM) hard-switching dc-to-dc regulators is presented. The power stage and the feedback control circuit are analyzed as two interconnected blocks. The intersection of their open-loop dc steady-state characteristics with the ramp voltage provides a guess candidate steady-state solution (CS). An iterative process is used to validate it as true steady-state solution (TS) when the bias conditions of switching devices (SDs) are fulfilled everywhere in the switching period.
Steady state analysis of pwm dc-to-dc regulators
FEMIA, Nicola;SPAGNUOLO, Giovanni;
2003-01-01
Abstract
A new method for steady-state analysis of pulsewidth modulation (PWM) hard-switching dc-to-dc regulators is presented. The power stage and the feedback control circuit are analyzed as two interconnected blocks. The intersection of their open-loop dc steady-state characteristics with the ramp voltage provides a guess candidate steady-state solution (CS). An iterative process is used to validate it as true steady-state solution (TS) when the bias conditions of switching devices (SDs) are fulfilled everywhere in the switching period.File in questo prodotto:
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