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EnglishA hardware architecture is applied to the calculation of a Difference-of-Gaussian filter, which is typically employed in image processing algorithms. The architecture has a modular structure to easily allow the matching of the desired delay/area ratio as well as a high computational accuracy. A new solution is provided for the implementation of multiply-accumulators which allows a significant reduction of area with respect to the conventional architectures.
| Titolo: | Multiplierless coprocessor for difference of Gaussian (DOG) calculation | |
| Autori: | ||
| Data di pubblicazione: | 2013 | |
| Abstract: | A hardware architecture is applied to the calculation of a Difference-of-Gaussian filter, which is typically employed in image processing algorithms. The architecture has a modular structure to easily allow the matching of the desired delay/area ratio as well as a high computational accuracy. A new solution is provided for the implementation of multiply-accumulators which allows a significant reduction of area with respect to the conventional architectures. | |
| Handle: | http://hdl.handle.net/11386/4208654 | |
| Appare nelle tipologie: | 6.1 Brevetto |
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