Fine resolution selection of the sample rate is not available in digital storage oscilloscopes. They rely on offline processing to cope with such need. The paper presents an algorithm that, exploiting online processing with a digital filter characterized by dynamically generated coefficients and a memory management strategy, allows almost arbitrary selection of the sample rate from an incoming stream of samples. The paper also proposes a digital circuit implemented on FPGA to devise the possible performance of the method.

Digital Circuit for the Arbitrary Selection of Sample Rate in Digital Storage Oscilloscopes

Ettore Napoli;
2019-01-01

Abstract

Fine resolution selection of the sample rate is not available in digital storage oscilloscopes. They rely on offline processing to cope with such need. The paper presents an algorithm that, exploiting online processing with a digital filter characterized by dynamically generated coefficients and a memory management strategy, allows almost arbitrary selection of the sample rate from an incoming stream of samples. The paper also proposes a digital circuit implemented on FPGA to devise the possible performance of the method.
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11386/4772663
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