Two high-speed direct digital frequency synthesizers (DDFS) have been fabricated in CMOS 0.25 μm technology. Both DDFS provides two quadrature phase 12 bit outputs with a spectral purity of 80 dBc. The first circuit reaches a maximum operating frequency of 600 MHz. The second circuit operates up to 480 MHz clock speed while dissipating only 72 μW/MHz. The proposed circuits employ an innovative high-speed architecture for sine and cosine functions approximation, based on a hardware-effective linear interpolation approach name as "dual-slope".

High-speed Direct Digital Frequency Synthesizers in 0.25-um CMOS

E. NAPOLI;
2004-01-01

Abstract

Two high-speed direct digital frequency synthesizers (DDFS) have been fabricated in CMOS 0.25 μm technology. Both DDFS provides two quadrature phase 12 bit outputs with a spectral purity of 80 dBc. The first circuit reaches a maximum operating frequency of 600 MHz. The second circuit operates up to 480 MHz clock speed while dissipating only 72 μW/MHz. The proposed circuits employ an innovative high-speed architecture for sine and cosine functions approximation, based on a hardware-effective linear interpolation approach name as "dual-slope".
2004
0780384954
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11386/4772713
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