A new approach to design a Digital Direct Frequency Synthesizer using Chebyshev polynomial approximation is presented. The proposed technique is an improvement of previously DDFS circuits based on Taylor approximation. A detailed description of the method used to compute the content of the ROM in Chebyshev DDFS is given, analytically showing the improved accuracy of new DDFS with respect to Taylor one. Two new Chebyshev DDFS with 80dBc SFDR, have been designed up to the layout level, exploiting optimized arithmetic circuits. Simulation results confirm improvement in performances with respect to Taylor DDFS.
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