A new approach to design a ROM-less direct digital frequency synthesizer (DDFS) is presented. An optimized polynomial interpolation technique has been used to achieve a 60 dBc or 80 dBc spurious-free dynamic range. Also, in the paper a new technique for designing efficient circuits for the evaluation of polynomial functions is presented. The new DDFS compares favorably with state of the art DDFSs designed using the CORDIC algorithm.
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