We propose a hybrid device consisting of a graphene/silicon (Gr/Si) Schottky diode in parallel with a Gr/SiO2/Si capacitor for high-performance photodetection. The device, fabricated by transfer of commercial graphene on low-doped n-type Si substrate, achieves a photoresponse as high as 3 AW−1 and a normalized detectivity higher than 3.5×1012 cmHz1/2 W−1 in the visible range. It exhibits a photocurrent exceeding the forward current because photo-generated minority carriers, accumulated at Si/SiO2 interface of the Gr/SiO2/Si capacitor, diffuse to the Gr/Si junction. We show that the same mechanism, when due to thermally generated carriers, although usually neglected or disregarded, causes the increased leakage often measured in Gr/Si heterojunctions. We perform extensive I–V and C-V characterization at different temperatures and we measure a zero-bias Schottky barrier height of 0.52 eV at room temperature, as well as an effective Richardson constant A** = 4×10−5 A cm−2 K−2 and an ideality factor n3.6, explained by a thin (<1 nm) oxide layer at the Gr/Si interface.

Hybrid graphene/silicon Schottky photodiode with intrinsic gating effect

DI BARTOLOMEO, Antonio
Writing – Original Draft Preparation
;
LUONGO, GIUSEPPE
Formal Analysis
;
FUNICELLO, NICOLA
Data Curation
;
2017-01-01

Abstract

We propose a hybrid device consisting of a graphene/silicon (Gr/Si) Schottky diode in parallel with a Gr/SiO2/Si capacitor for high-performance photodetection. The device, fabricated by transfer of commercial graphene on low-doped n-type Si substrate, achieves a photoresponse as high as 3 AW−1 and a normalized detectivity higher than 3.5×1012 cmHz1/2 W−1 in the visible range. It exhibits a photocurrent exceeding the forward current because photo-generated minority carriers, accumulated at Si/SiO2 interface of the Gr/SiO2/Si capacitor, diffuse to the Gr/Si junction. We show that the same mechanism, when due to thermally generated carriers, although usually neglected or disregarded, causes the increased leakage often measured in Gr/Si heterojunctions. We perform extensive I–V and C-V characterization at different temperatures and we measure a zero-bias Schottky barrier height of 0.52 eV at room temperature, as well as an effective Richardson constant A** = 4×10−5 A cm−2 K−2 and an ideality factor n3.6, explained by a thin (<1 nm) oxide layer at the Gr/Si interface.
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11386/4683080
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