The paper presents a one dimensional model for the duration of the increased breakdown voltage phase in Deep Depletion power devices. The model includes the effect of bulk generation and space charge generation that is verified against numerical simulations of a nSi-BOX-pSi structure. The fi- nal result of the model, the duration of the high breakdown voltage phase as a function of device characteristic and the applied voltage, is verified against experimental results regarding the duration of the increased breakdown voltage phase in a power LDMOS in SOI technology. The results show that the interface states are probably the limiting factor for the duration of the increased breakdown voltage phase.
Modeling the Duration of the High Breakdown Voltage Phase in Deep Depletion Power Devices
Ettore Napoli
2008-01-01
Abstract
The paper presents a one dimensional model for the duration of the increased breakdown voltage phase in Deep Depletion power devices. The model includes the effect of bulk generation and space charge generation that is verified against numerical simulations of a nSi-BOX-pSi structure. The fi- nal result of the model, the duration of the high breakdown voltage phase as a function of device characteristic and the applied voltage, is verified against experimental results regarding the duration of the increased breakdown voltage phase in a power LDMOS in SOI technology. The results show that the interface states are probably the limiting factor for the duration of the increased breakdown voltage phase.I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.
