Design and implementation of a pre processing circuit for band-pass signals acquisition

The processing capabilities included into the acquisition block of the real-time digital oscilloscopes largely contribute to determine the overall performance of the instrument. Their remarkable improvement has made it possible to enhance the performance in terms of increased measurement rate, automation, and of reduced measurement uncertainty related to quantization and noise. The paper presents the implementation of a pre-processing circuit for a novel acquisition mode of band-pass signals, which is characterized by an increased vertical resolution. While the theoretical foundations were recently presented with simulative results, here, the circuital implementation of such acquisition mode is presented. The focus is on mid-low cost digital oscilloscopes, that can improve their vertical resolution at a negligible additional cost. First, a preliminary Field Programmable Gate Array (FPGA) implementation is considered in order to evaluate the achievable performance both from a theoretical point of view and throughout experimental tests. Then, a custom Application Specific Integrated Circuit (ASIC) implementation, in 28 nm CMOS technology, is analyzed. Along with the parameter optimization, the work experimentally tests the acquisition mode and evaluates the effects of non-ideal characteristics, such as finite word length and non-ideal filtering. The increase in the Effective Number of Bit (ENoB) is up to 2.5 bit, while the ENoB degradation due to word length and non-ideal filtering is quantified as about 1.1 bit and 0.5 bit. The design highlights that there is substantial margin for parallel implementation which is the base to candidate the proposed solution as a remarkable option for the next generation oscilloscopes.