An innovative design concept for the silicon-oninsulator (SOI) lateral power devices that can be applied to a wide class of high-voltage applications, in particular those employing resonant switching, is presented. A nonuniformly doped substrate is used to improve the transient breakdown performance of the lateral MOSTs. The simulation results show that the proposed device exhibits a largely improved transient breakdown. That is, for a time interval that ranges from 10 μs to 10 ms depending on the silicon characteristics and temperature, the device exhibits a blocking voltage that is almost double when compared to the static blocking voltage. By using the novel concept presented here, one can design a high-performance device with a high transient breakdown, which is needed for most switching applications. The device will benefit from a smaller substrate oxide thickness designed for a lower static breakdown, which results in reduced self-heating and allows full compatibility with the mainstream SOI material.

Substrate Engineering for Improved Transient Breakdown Voltage in SOI Lateral Power MOS

NAPOLI, ETTORE;
2006-01-01

Abstract

An innovative design concept for the silicon-oninsulator (SOI) lateral power devices that can be applied to a wide class of high-voltage applications, in particular those employing resonant switching, is presented. A nonuniformly doped substrate is used to improve the transient breakdown performance of the lateral MOSTs. The simulation results show that the proposed device exhibits a largely improved transient breakdown. That is, for a time interval that ranges from 10 μs to 10 ms depending on the silicon characteristics and temperature, the device exhibits a blocking voltage that is almost double when compared to the static blocking voltage. By using the novel concept presented here, one can design a high-performance device with a high transient breakdown, which is needed for most switching applications. The device will benefit from a smaller substrate oxide thickness designed for a lower static breakdown, which results in reduced self-heating and allows full compatibility with the mainstream SOI material.
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11386/4772744
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