An ultra low power hardware implementation of Human Activity Recognition systems imposes very tight constraints. Therefore it requires a very thoughtful balancing between highly accurate results and the reduction of the allocated physical resources. Deep Learning models provide the highest accuracies, however their typical computational complexity and memory requirements are not easily deployable in handheld or wearable devices which embody very constrained memory and computation capabilities. In this work, we introduce a new HAR system built with a new Hybrid Binarized Neural Network suitable for a very compact and ultra low-power hardware implementation. The system receives data from MEMS based inertial sensors and makes the acquisitions independent from the sensor spatial orientation and the gravity acceleration signal. The system has been trained and validated on the PAMAP2 and SHL dataset. In both cases, it achieves accuracies higher than 99% in the best case, with different input sensor configurations. A custom circuit has been implemented, which extensively shares circuitry between the different functional sub-modules of the system to minimize the amount of mapped physical resources. The FPGA implementation on a Xilinx Artix 7 achieves a total power dissipation of 72 mW and occupies 6788 LUTs.

Highly-accurate binary tiny neural network for low-power human activity recognition

De Vita A.;Di Benedetto L.;Rubino A.;Licciardo G. D.
2021

Abstract

An ultra low power hardware implementation of Human Activity Recognition systems imposes very tight constraints. Therefore it requires a very thoughtful balancing between highly accurate results and the reduction of the allocated physical resources. Deep Learning models provide the highest accuracies, however their typical computational complexity and memory requirements are not easily deployable in handheld or wearable devices which embody very constrained memory and computation capabilities. In this work, we introduce a new HAR system built with a new Hybrid Binarized Neural Network suitable for a very compact and ultra low-power hardware implementation. The system receives data from MEMS based inertial sensors and makes the acquisitions independent from the sensor spatial orientation and the gravity acceleration signal. The system has been trained and validated on the PAMAP2 and SHL dataset. In both cases, it achieves accuracies higher than 99% in the best case, with different input sensor configurations. A custom circuit has been implemented, which extensively shares circuitry between the different functional sub-modules of the system to minimize the amount of mapped physical resources. The FPGA implementation on a Xilinx Artix 7 achieves a total power dissipation of 72 mW and occupies 6788 LUTs.
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Utilizza questo identificativo per citare o creare un link a questo documento: http://hdl.handle.net/11386/4773002
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