Implementation of Hardware Architecture for SVPWM with Arbitrary Parameters

A novel hardware digital architecture for the Space Vector PulseWidth Modulation technique is proposed. Its characteristics are the reduced demand for resources and the possibility to change in real-time the values of the carrier and switching frequencies, of the phase and of the amplitude of the three-phase output voltages without external reference signals or processor. The basic idea is to pre-calculate a set of normalized dwell-time for only one sixth of the α-β-plane and, then, to reconstruct through our architecture the effective dwell-times and the right inverter configurations by an optimized management of the memory. The architecture is implemented in a Field Programmable Gate Array Cyclone V using the 6% and the 1.01%, respectively, of the Look-Up Tables and of the Flip Flops and the experimental measurements show the goodness of the generated waveforms and the high numbers of degrees of freedom without the demand of Digital Signal Processor or Personal Computer.