Error resilient applications benefit from the use of approximate computing techniques that enhance electrical performances while allowing a deviation from the exact result. Many operations in signal processing require the square of a signal. Despite the fact that the squaring operation can be regarded as a special multiplication case, it is often preferable to develop independent squaring circuits to exploit possible architectural symmetries. This paper proposes novel approximate binary squarers, obtained by recursively exploiting 4-bit approximate mul-tipliers and squarers. The final designs cover a wide range of computing precision, providing the user with multiple choices of different cost vs. accuracy trade-offs. The proposed circuits, as well as competitive designs, are synthesized targeting a 14 nm FinFET technology to determine the electrical characteristics. It is demon-strated that the proposed squarers outperform the state-of-the-art in terms of power vs. precision. Compared to the exact 8-bit squarer, the least dissipative proposed design reduces silicon area by 76%, power consumption by 71%, and critical delay by 72%. The same circuit dissipates 2.4% less power than the least dissipative design found in literature, while providing 34% more accurate results. The behavior of the considered designs is also tested in common error resilient applications, like signal demodulation and image processing.

Approximate squaring circuits exploiting recursive architectures

Napoli, E
2023-01-01

Abstract

Error resilient applications benefit from the use of approximate computing techniques that enhance electrical performances while allowing a deviation from the exact result. Many operations in signal processing require the square of a signal. Despite the fact that the squaring operation can be regarded as a special multiplication case, it is often preferable to develop independent squaring circuits to exploit possible architectural symmetries. This paper proposes novel approximate binary squarers, obtained by recursively exploiting 4-bit approximate mul-tipliers and squarers. The final designs cover a wide range of computing precision, providing the user with multiple choices of different cost vs. accuracy trade-offs. The proposed circuits, as well as competitive designs, are synthesized targeting a 14 nm FinFET technology to determine the electrical characteristics. It is demon-strated that the proposed squarers outperform the state-of-the-art in terms of power vs. precision. Compared to the exact 8-bit squarer, the least dissipative proposed design reduces silicon area by 76%, power consumption by 71%, and critical delay by 72%. The same circuit dissipates 2.4% less power than the least dissipative design found in literature, while providing 34% more accurate results. The behavior of the considered designs is also tested in common error resilient applications, like signal demodulation and image processing.
File in questo prodotto:
Non ci sono file associati a questo prodotto.

I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.

Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11386/4836472
 Attenzione

Attenzione! I dati visualizzati non sono stati sottoposti a validazione da parte dell'ateneo

Citazioni
  • ???jsp.display-item.citation.pmc??? ND
  • Scopus 0
  • ???jsp.display-item.citation.isi??? 0
social impact