Two-dimensional rhenium disulfide (ReS2), a member of the transition-metal dichalcogenide family, has received significant attention due to its potential applications in field-effect transistors (FETs), photodetectors, and memories. In this work, we investigate the suppression of the subthreshold current during the forward voltage gate sweep, leading to an inversion of the hysteresis in the transfer characteristics of ReS2 nanosheet-based FETs from clockwise to anticlockwise. We explore the impact of temperature, sweeping gate voltage, and pressure on this behavior. Notably, the suppression in current within the subthreshold region coincides with a peak in gate current, which increases beyond a specific temperature but remains unaffected by pressure. We attribute both the suppression in drain current and the presence of peak in gate current to the charge/discharge process of gate oxide traps by thermal-assisted tunnelling. The suppression of the subthreshold current at high temperatures not only reduces power consumption but also extends the operational temperature range of ReS2 nanosheet-based FETs.

Subthreshold Current Suppression in ReS2 Nanosheet-Based Field-Effect Transistors at High Temperatures

Durante, Ofelia
Writing – Original Draft Preparation
;
Intonti, Kimberly
Formal Analysis
;
Viscardi, Loredana
Investigation
;
De Stefano, Sebastiano
Formal Analysis
;
Faella, Enver
Investigation
;
Kumar, Arun
Investigation
;
Pelella, Aniello
Investigation
;
Romeo, Francesco
Data Curation
;
Di Bartolomeo, Antonio
Writing – Review & Editing
2023-01-01

Abstract

Two-dimensional rhenium disulfide (ReS2), a member of the transition-metal dichalcogenide family, has received significant attention due to its potential applications in field-effect transistors (FETs), photodetectors, and memories. In this work, we investigate the suppression of the subthreshold current during the forward voltage gate sweep, leading to an inversion of the hysteresis in the transfer characteristics of ReS2 nanosheet-based FETs from clockwise to anticlockwise. We explore the impact of temperature, sweeping gate voltage, and pressure on this behavior. Notably, the suppression in current within the subthreshold region coincides with a peak in gate current, which increases beyond a specific temperature but remains unaffected by pressure. We attribute both the suppression in drain current and the presence of peak in gate current to the charge/discharge process of gate oxide traps by thermal-assisted tunnelling. The suppression of the subthreshold current at high temperatures not only reduces power consumption but also extends the operational temperature range of ReS2 nanosheet-based FETs.
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Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11386/4850811
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