Forcecardiography (FCG) is a novel technique for the non-invasive acquisition of cardiac and respiratory induced chest wall vibrations that has been demonstrated using innovative, non-invasive force sensors. FCG sensors offer richer informational content by capturing infrasonic and audible vibrations that are not captured by other cardio-mechanical monitoring techniques like seismocardiography (SCG). However, the extraction of relevant vibrational components from FCG data requires dedicated processing that has been proposed and only demonstrated with off-line processing. This paper analyses the design trade-offs for the implementation of a compact processing system for the real-time extraction and wireless transmission of FCG components, which could enable home-care and telemedicine applications. The design target is an ARM/FPGA SoC board for acquiring, processing, and wireless transmission of the processed data. Preliminary results indicate that efficiently extracting various frequency bands in real time with a latency of less than 200 ms is feasible.
Towards the Design of a Real-Time Processing System for Forcecardiography Signals
Zacharelos, Efstratios
;Esposito, Daniele;Giaquinto, Martino;Napoli, Ettore
2025
Abstract
Forcecardiography (FCG) is a novel technique for the non-invasive acquisition of cardiac and respiratory induced chest wall vibrations that has been demonstrated using innovative, non-invasive force sensors. FCG sensors offer richer informational content by capturing infrasonic and audible vibrations that are not captured by other cardio-mechanical monitoring techniques like seismocardiography (SCG). However, the extraction of relevant vibrational components from FCG data requires dedicated processing that has been proposed and only demonstrated with off-line processing. This paper analyses the design trade-offs for the implementation of a compact processing system for the real-time extraction and wireless transmission of FCG components, which could enable home-care and telemedicine applications. The design target is an ARM/FPGA SoC board for acquiring, processing, and wireless transmission of the processed data. Preliminary results indicate that efficiently extracting various frequency bands in real time with a latency of less than 200 ms is feasible.I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.