We report the fabrication and characterization of suspended InAs nanowire field-effect transistors (FETs) for optoelectronic memory applications. The devices were realized by depositing InAs nanowires onto a polymethyl methacrylate (PMMA) sacrificial layer, followed by metal contact definition and PMMA removal to achieve a fully suspended architecture. Electrical measurements under high vacuum revealed n-type transistor behavior with good gate modulation and Ohmic contacts. Under laser illumination, the devices exhibited both positive and negative photoconductivity, depending on the gate bias, due to the interaction between photogenerated carriers and surface trap states. By exploiting the hysteretic transfer characteristics and the optical response, we demonstrated memory operation controlled by two independent variables: gate voltage and illumination condition. The device showed well-separated and stable current levels corresponding to different write–read–erase states, highlighting its potential as a multifunctional optoelectronic memory for future nanoelectronic circuits.

Optoelectronic memory with suspended InAs nanowire field effect transistor

Pelella, Aniello
Writing – Original Draft Preparation
;
Sessa, Andrea
Formal Analysis
;
Mazzotti, Adolfo
Formal Analysis
;
Giubileo, Filippo
Data Curation
;
Di Bartolomeo, Antonio
Writing – Review & Editing
2025

Abstract

We report the fabrication and characterization of suspended InAs nanowire field-effect transistors (FETs) for optoelectronic memory applications. The devices were realized by depositing InAs nanowires onto a polymethyl methacrylate (PMMA) sacrificial layer, followed by metal contact definition and PMMA removal to achieve a fully suspended architecture. Electrical measurements under high vacuum revealed n-type transistor behavior with good gate modulation and Ohmic contacts. Under laser illumination, the devices exhibited both positive and negative photoconductivity, depending on the gate bias, due to the interaction between photogenerated carriers and surface trap states. By exploiting the hysteretic transfer characteristics and the optical response, we demonstrated memory operation controlled by two independent variables: gate voltage and illumination condition. The device showed well-separated and stable current levels corresponding to different write–read–erase states, highlighting its potential as a multifunctional optoelectronic memory for future nanoelectronic circuits.
File in questo prodotto:
Non ci sono file associati a questo prodotto.

I documenti in IRIS sono protetti da copyright e tutti i diritti sono riservati, salvo diversa indicazione.

Utilizza questo identificativo per citare o creare un link a questo documento: https://hdl.handle.net/11386/4925479
 Attenzione

Attenzione! I dati visualizzati non sono stati sottoposti a validazione da parte dell'ateneo

Citazioni
  • ???jsp.display-item.citation.pmc??? ND
  • Scopus ND
  • ???jsp.display-item.citation.isi??? ND
social impact