DONISI, ANDREA
 Distribuzione geografica
Continente #
EU - Europa 155
NA - Nord America 65
AS - Asia 64
SA - Sud America 24
AF - Africa 2
Totale 310
Nazione #
US - Stati Uniti d'America 63
IT - Italia 46
EE - Estonia 39
RU - Federazione Russa 39
SG - Singapore 31
CN - Cina 26
BR - Brasile 21
IE - Irlanda 7
AT - Austria 5
DE - Germania 5
NL - Olanda 4
FI - Finlandia 3
HK - Hong Kong 3
MX - Messico 2
PE - Perù 2
RO - Romania 2
SE - Svezia 2
BD - Bangladesh 1
CZ - Repubblica Ceca 1
EC - Ecuador 1
FR - Francia 1
IN - India 1
IQ - Iraq 1
IR - Iran 1
NG - Nigeria 1
RS - Serbia 1
TN - Tunisia 1
Totale 310
Città #
Tallinn 39
Singapore 18
Ashburn 10
Beijing 10
Princeton 10
Moscow 7
Salerno 6
Chandler 5
Dublin 5
Naples 5
Ann Arbor 4
Fisciano 4
Florence 4
Guangzhou 4
Nocera Inferiore 4
Amsterdam 3
Hong Kong 3
Kiel 3
Washington 3
Wilmington 3
Domicella 2
Duncan 2
Ferrara 2
Helsinki 2
Maiori 2
Sundsvall 2
Vienna 2
Yubileyny 2
Afogados da Ingazeira 1
Andover 1
Araxá 1
Arequipa 1
Aryanah 1
Bari 1
Belgrade 1
Campos Novos 1
Candói 1
Caraguatatuba 1
Cascavel 1
Constanța 1
Cotia 1
Cuenca 1
Curitiba 1
Fortaleza 1
Frattamaggiore 1
Heze 1
Jundiaí 1
Lagos 1
Lappeenranta 1
Leme 1
Lima 1
Marília 1
Mexico City 1
Mountain View 1
Munich 1
Nanyang 1
Nazaré Paulista 1
Osasco 1
Patos de Minas 1
Piraquara 1
Prague 1
Pune 1
Purcellville 1
Redwood City 1
Rio Claro 1
Rio de Janeiro 1
Salvador 1
San Luis Potosí City 1
Santa Vitória do Palmar 1
Shenzhen 1
Toledo 1
Woodbridge 1
Totale 210
Nome #
A Hardware Architecture for SVPWM Digital Control with Variable Carrier Frequency and Amplitude 65
Low-power CNN for Real-time Driver Posture Monitoring by Image Processing 56
FPGA HardWare Architecture for SVPWM Based on a Taylor Series Decomposition 39
A Fully FPGA Implementation of SVPWM for Three-phase Inverters without External Reference Signals 39
A New Hardware Architecture for SVPWM Technique Based on the Taylor Decomposition 33
Implementation of Hardware Architecture for SVPWM with Arbitrary Parameters 33
A Novel FPGA HW Implementation for SVPWM Technique Using Taylor Series 23
Design of digital controller for SVPWM algorithm with real-time control of the output amplitude and switching frequency 20
A FPGA HardWare Architecture for AZSPWM Based on a Taylor Series Decomposition 18
Totale 326
Categoria #
all - tutte 1.909
article - articoli 0
book - libri 0
conference - conferenze 0
curatela - curatele 0
other - altro 0
patent - brevetti 0
selected - selezionate 0
volume - volumi 0
Totale 1.909


Totale Lug Ago Sett Ott Nov Dic Gen Feb Mar Apr Mag Giu
2020/20213 0 0 0 2 0 0 0 0 1 0 0 0
2021/202240 0 0 2 0 5 6 8 1 8 2 1 7
2022/202338 6 2 4 5 0 4 1 0 5 5 1 5
2023/202475 7 6 13 2 7 10 8 2 2 0 7 11
2024/2025170 2 1 6 53 3 15 56 10 21 2 1 0
Totale 326