UniSa - IRIS Institutional Research Information System

Sfoglia per Autore  

Opzioni
Mostrati risultati da 41 a 60 di 185
Titolo Data di pubblicazione Autore(i) File
He voids lifetime control compared with buffer-layer engineering for a 600V punch-through IGBT 1-gen-2002 Napoli, E.; Strollo, A. G. M.; Spirito, P.; Frisina, F.; Fragapane, L.; Fagone, D.
Design of a 600V Punch-through IGBT using local lifetime control. On-state voltage drop vs. turn-off time optimization 1-gen-2002 Napoli, E.; Strollo, A.; Spirito, P.; Frisina, F.; Fragapane, L.; Fagone, D.
Design of IGBT with Integral Freewheeling Diode 1-gen-2002 Napoli, Ettore; Spirito, Paolo; Strollo, ANTONIO GIUSEPPE MARIA; F., Frisina; L., Fragapane; D., Fagone
Direct Digital Frequency Synthesizers using high-order Polynomial Approximation 1-gen-2002 Strollo, ANTONIO GIUSEPPE MARIA; Napoli, Ettore; DE CARO, Davide
Direct Digital Frequency Synthesizers using First-Order Polynomial Chebyshev Approximation 1-gen-2002 Strollo, ANTONIO GIUSEPPE MARIA; Napoli, Ettore; DE CARO, Davide
ROM-less Direct Digital Frequency Synthesizers exploiting Polynomial Approximation 1-gen-2002 DE CARO, Davide; Napoli, Ettore; Strollo, ANTONIO GIUSEPPE MARIA
True random number generator based on LFSR sampling 1-gen-2003 Strollo, ANTONIO GIUSEPPE MARIA; DE CARO, Davide; N., Petra; Napoli, Ettore
VLSI Design of a (255,239) Reed-Solomon Decoder 1-gen-2003 Strollo, A.; Petra, N.; DE CARO, D.; Napoli, E.
Fixed-width Multipliers with Dual-tree Error Compensation 1-gen-2003 Strollo, A.; Petra, N.; DE CARO, D.; Napoli, E.
Direct Digital Frequency Synthesis with Dual-slope Approach 1-gen-2003 Strollo, ANTONIO GIUSEPPE MARIA; DE CARO, Davide; Napoli, Ettore; N., Petra
Direct digital frequency synthesizers with polynomial hyperfolding technique 1-gen-2004 DE CARO, Davide; Napoli, Ettore; Strollo, ANTONIO GIUSEPPE MARIA
An area-efficient high-speed Reed-Solomon decoder in 0.25um CMOS 1-gen-2004 Strollo, A.; DE CARO, D.; Napoli, E.; Petra, N.
High-speed Direct Digital Frequency Synthesizers in 0.25-um CMOS 1-gen-2004 Strollo, A.; DE CARO, D.; Napoli, E.; Petra, N.
Modeling Turn-off Voltage rise in SOI LIGBT 1-gen-2005 Napoli, Ettore; V., Pathirana; F., Udrea
A novel high-speed sense-amplifier-based flip-flop 1-gen-2005 Strollo, ANTONIO GIUSEPPE MARIA; DE CARO, Davide; Napoli, Ettore; Petra, Nicola
A compact model for thin SOI LIGBTs: description, experimental verification and system application 1-gen-2005 Napoli, Ettore; V., Pathirana; F., Udrea; G., Bonnet; T., Trajkovic; G., Amaratunga
A high-speed sense-amplifier based flip-flop 1-gen-2005 DE CARO, Davide; Napoli, Ettore; Petra, Nicola; Strollo, ANTONIO GIUSEPPE MARIA
Modeling Voltage Derivative During Inductive Turnoff in Thin SOI LIGBT 1-gen-2005 Napoli, Ettore; V., Pathirana; F., Udrea
Complete Isothermal Model for the Lateral Insulated Gate Bipolar Transistor on SOI technology 1-gen-2005 V., Pathirana; S., Gamage; Napoli, Ettore; F., Udrea
ACCURATE PHYSICAL MODEL FOR THE LATERAL IGBT IN SILICON ON INSULATOR TECHNOLOGY 1-gen-2005 Napoli, Ettore; V., Pathirana; F., Udrea
Mostrati risultati da 41 a 60 di 185
Legenda icone

  •  file ad accesso aperto
  •  file disponibili sulla rete interna
  •  file disponibili agli utenti autorizzati
  •  file disponibili solo agli amministratori
  •  file sotto embargo
  •  nessun file disponibile