UniSa - IRIS Institutional Research Information System

NAPOLI, Ettore
 Distribuzione geografica
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Continente #
AS - Asia 2.877
NA - Nord America 2.868
EU - Europa 993
SA - Sud America 230
AF - Africa 39
OC - Oceania 3
Continente sconosciuto - Info sul continente non disponibili 1
Totale 7.011
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Nazione #
US - Stati Uniti d'America 2.804
SG - Singapore 1.473
HK - Hong Kong 888
CN - Cina 278
IE - Irlanda 273
RU - Federazione Russa 217
BR - Brasile 194
DE - Germania 170
IT - Italia 142
VN - Vietnam 65
CA - Canada 33
GB - Regno Unito 33
JP - Giappone 30
FR - Francia 28
IN - India 27
MX - Messico 25
FI - Finlandia 21
ZA - Sudafrica 18
ES - Italia 17
SE - Svezia 17
IR - Iran 14
PL - Polonia 14
TR - Turchia 14
BD - Bangladesh 13
IQ - Iraq 13
AR - Argentina 12
NL - Olanda 11
UA - Ucraina 10
KR - Corea 9
AZ - Azerbaigian 8
CO - Colombia 8
SI - Slovenia 8
AE - Emirati Arabi Uniti 6
PK - Pakistan 6
AT - Austria 5
EC - Ecuador 5
GR - Grecia 5
KE - Kenya 5
LT - Lituania 4
NP - Nepal 4
SA - Arabia Saudita 4
UY - Uruguay 4
DZ - Algeria 3
ID - Indonesia 3
KW - Kuwait 3
NO - Norvegia 3
PE - Perù 3
PH - Filippine 3
PY - Paraguay 3
TN - Tunisia 3
AU - Australia 2
CG - Congo 2
CH - Svizzera 2
EE - Estonia 2
EG - Egitto 2
HU - Ungheria 2
IL - Israele 2
JM - Giamaica 2
JO - Giordania 2
MK - Macedonia 2
MM - Myanmar 2
TL - Timor Orientale 2
TT - Trinidad e Tobago 2
AM - Armenia 1
BE - Belgio 1
BG - Bulgaria 1
BY - Bielorussia 1
CL - Cile 1
CW - ???statistics.table.value.countryCode.CW??? 1
CZ - Repubblica Ceca 1
GA - Gabon 1
GE - Georgia 1
KG - Kirghizistan 1
LC - Santa Lucia 1
MA - Marocco 1
MD - Moldavia 1
ML - Mali 1
NC - Nuova Caledonia 1
NE - Niger 1
OM - Oman 1
PR - Porto Rico 1
PS - Palestinian Territory 1
RO - Romania 1
SD - Sudan 1
SK - Slovacchia (Repubblica Slovacca) 1
SN - Senegal 1
TJ - Tagikistan 1
TW - Taiwan 1
UZ - Uzbekistan 1
Totale 7.011
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Città #
Hong Kong 886
Princeton 648
Dallas 566
Singapore 531
Dublin 272
Chandler 211
Munich 150
Los Angeles 146
Moscow 123
Ashburn 112
Wilmington 94
The Dalles 86
Santa Clara 49
Columbus 45
New York 42
Beijing 40
Norwalk 38
São Paulo 25
Tokyo 24
Ann Arbor 23
Prad am Stilfser Joch 23
Guangzhou 21
San Francisco 21
Hanoi 18
Ho Chi Minh City 18
Montreal 17
Stockholm 16
Woodbridge 16
Charlotte 14
Chicago 14
Johannesburg 14
Milan 14
Atlanta 13
Warsaw 13
Boston 12
Brooklyn 11
Chennai 11
Shanghai 11
Denver 10
Fort Worth 10
Fisciano 9
Seattle 9
Turku 9
Baku 8
Belo Horizonte 8
Ljubljana 8
San Jose 8
Amsterdam 7
Ankara 7
London 7
Manchester 7
Mexico City 7
Nuremberg 7
Salerno 7
Baghdad 6
Jacksonville 6
Lappeenranta 6
Livorno 6
Pittsburgh 6
Prineville 6
Tehran 6
Wuhan 6
Curitiba 5
Dalian 5
Helsinki 5
Naples 5
Paris 5
Phoenix 5
Springfield 5
Vancouver 5
Biên Hòa 4
Campinas 4
Carbonara di Nola 4
City of London 4
Council Bluffs 4
Craponne 4
Frankfurt am Main 4
Haiphong 4
Houston 4
Nairobi 4
Poplar 4
Rio de Janeiro 4
Barano d'Ischia 3
Bengaluru 3
Boardman 3
Bogotá 3
Cincinnati 3
Dhaka 3
Duncan 3
Erbil 3
Goiânia 3
Guarulhos 3
Ha Long 3
Hangzhou 3
Hyderabad 3
Ipatinga 3
Istanbul 3
Izmir 3
Kuwait City 3
Limeira 3
Totale 4.706
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Nome #
FPGA implementation of the CCSDS-123.0-B-1 lossless Hyperspectral Image compression algorithm prediction stage 401
Towards the Design of a Real-Time Processing System for Forcecardiography Signals 280
Approximate Multipliers Using Static Segmentation: Error Analysis and Improvements 196
Approximate Full-Adders: A Comprehensive Analysis 187
Memory analysis of Interest Point Detector and Compact Descriptor algorithms 117
A Novel Approximate Multiplier Based on Improved Logarithmic and Antilogarithmic Conversions 96
A Context-Aware Multimedia Recommender System for activities planning in mobile environments 88
Analytical modeling of breakdown voltage of superjunction power devices 87
A New Global Optimization Algorithm and Its Application to MOSFET Model Parameter Extraction 78
A 3.3 GHz Spread-Spectrum Clock Generator Supporting Discontinuous Frequency Modulations in 28 nm CMOS 77
A compact model for thin SOI LIGBTs: description, experimental verification and system application 69
A 1.45 GHz All-Digital Spread Spectrum Clock Generator in 65nm CMOS for Synchronization Free SoC Applications 69
1300 V, 2 ms pulse inductive load switching test circuit with 20 ns selectable crowbar intervention 65
A Fast and Area Efficient Complementary pass-transistor logic carry-skip adder 65
A Binary Line Buffer Circuit Featuring Lossy Data Compression at Fixed Maximum Data Rate 62
A high-speed sense-amplifier based flip-flop 58
A complete system to generate electrical noise with arbitrary power spectral density 57
A Dynamic Electro-thermal Model for Power PiN diode 56
3D electro-thermal simulations of wide area power devices operating in avalanche condition 52
A Novel Truncated Squarer with Linear Compensation Function 51
A novel UIS test system with Crowbar feedback for reduced failure energy in power devices testing 51
A Novel Module-Sign Low-Power Implementation for the DLMS Adaptive Filter With Low Steady-State Error 50
A New Algorithm for the Automatic Generation of Fuzzy Rules 49
A Frequency Domain Processor for Real-Time CDVS Keypoints Extraction 49
A novel time-domain processor for real time SAR operation 49
On-Chip Spike Detection and Classification using Neural Networks and Approximate Computing 46
A novel high-speed sense-amplifier-based flip-flop 46
Comparative analysis of differential colpitts and cross-coupled VCOs in 180 nm Si-Ge HBT technology 45
Hardware implementation of a spatio-temporal average filter for real-time denoising of fluoroscopic images 44
On the design and the efficiency of coupled step-up dc-dc converters 43
Impact of Donor Traps on the 2DEG and Electrical Behavior of AlGaN/GaN MISFETs 43
METHOD AND APPARATUS FOR COMPUTING IMAGE PYRAMIDS AND RELATED COMPUTER PROGRAM PRODUCT 42
Novel VLSI architecture for real time operations of one-bit coded synthetic radar imaging data 41
Programmable power spectral density noise source 40
Power Superjunction Devices : an Analytic Model for Breakdown Voltage 40
Design and implementation of a pre processing circuit for band-pass signals acquisition 39
Modelling and Implementation of an Accumulator-based ADPLL on a Virtex-5 38
Analysis of Power Dissipation in Double Edge Triggered Flip-Flops 38
Utilizing arbitrary waveform generators to produce noise with imposed spectral characteristics 38
Substrate Engineering for Improved Transient Breakdown Voltage in SOI Lateral Power MOS 38
Direct Digital Frequency Synthesizers using First-Order Polynomial Chebyshev Approximation 37
Design of a normally-off diamond JFET for high power integrated applications 37
Variable Latency Speculative Han-Carlson Adder 37
FPGA-based architecture for real time segmentation and denoising of HD video 37
Real-Time Downsampling in Digital Storage Oscilloscopes with Multichannel Architectures 37
Towards a frequency domain processor for real-time SIFT-based filtering 37
A VLSI processor for light-weight real-time SAR imaging using signum coded signal and time domain processing 36
The Effect of Charge Imbalance on Superjunction Power Devices: An Exact Analytical Solution 36
A Standard-Cell-Based All-Digital PWM Modulator With High Resolution and Spread-Spectrum Capability 36
Bidimensional lifetime control for high speed low-loss PiN rectifiers 36
Approximate adder with output correction for error tolerant applications and Gaussian distributed inputs 36
Modeling Turn-off Voltage rise in SOI LIGBT 36
Single Flip-flop Driving Circuit for glitch-free NAND-based Digitally Controlled Delay-Lines 36
Two-Dimensional Modeling of On State Voltage Drop in IGBT 35
On the design and the control of a coupled-inductors boost dc-ac converter for an individual PV panel 35
Noise with colored power spectrum derived from a single bit white noise input 35
Study of a failure mechanism during UIS switching of planar PT-IGBT with current sense cell 35
Truncated Binary Multipliers with Variable Correction and Minimum Mean Square Error 35
A SISO register circuit tailored for input data with low transition probability 35
Complete Isothermal Model for the Lateral Insulated Gate Bipolar Transistor on SOI technology 34
Design consideration of 1000V Merged PiN Schottky diode using Superjunction sustaining layer 34
Low-power Implementation of LMS Adaptive Filters Using Scalable Rounding 34
Design criteria for PiN diode using multiple He ion implantation for local lifetime control 34
Minimizing Coefficients Wordlength for Piecewise-Polynomial Hardware Function Evaluation With Exact or Faithful Rounding 34
Algorithm for Automatic Generation of Fuzzy Rules applied to power system controllers 34
Comprehensive Analysis of Input Order Invariant Approximate 4-2 Compressors for Binary Multipliers 33
Design of Power/Analog/Digital Systems through Mixed-level simulations 33
FPGA implementation of OpenCV compatible background identification circuit 33
Power Dissipation in One-latch and Two-latch Double Edge Triggered Flip-Flops 33
Progetto di sistemi elettronici digitali basati su dispositivi FPGA 33
Analysis of large area Trench-IGBT current distribution under UIS test with the aid of lock-in thermography 33
High-speed Direct Digital Frequency Synthesizers in 0.25-um CMOS 33
Physics, limits and application of the newly proposed deep depletion SOI power devices 33
Truncated Squarer with Minimum Mean-Square Error 33
DEEP DEPLETION SOI POWER DEVICES 32
Synthesis and generation of critical waveforms by means of AWG 32
A Reconfigurable 2D Convolver for Real-Time SAR Imaging 32
Quality-Scalable Approximate LMS Filter 32
ROM-less Direct Digital Frequency Synthesizers exploiting Polynomial Approximation 31
Automatic Parameter Extraction Technique for a PiN Diode Circuit Model 31
Modeling the Duration of the High Breakdown Voltage Phase in Deep Depletion Power Devices 31
New clock gating techniques for low power flip-flops 31
Comparison and Extension of Approximate 4-2 Compressors for Low-Power Approximate Multipliers 31
High Speed Speculative Multipliers Based on Speculative Carry-Save Tree 31
An FPGA processor for real-time, fixed-point refinement of CDVS keypoints 31
Numerical Analysis of Local Lifetime control for High-speed low-loss PiN diode design 31
Digital Circuit for the Arbitrary Selection of Sample Rate in Digital Storage Oscilloscopes 31
A VLSI architecture for real time processing of one-bit coded SAR signals 31
Effect of the Collector Design on the IGBT Avalanche Ruggedness: A Comparative Analysis between Punch-Through and Field-Stop Devices 31
Analytical Calculation of the Maximum Error for a Family of Truncated Multipliers Providing Minimum Mean Square Error 31
OpenCV compatible real time processor for background foreground identification 30
Analysis and comparison of Direct Digital Frequency Synthesizers implemented on FPGA 30
Digital Circuit for Seamless Resampling ADC Output Streams 30
Direct digital frequency synthesizers with polynomial hyperfolding technique 30
Fixed-Width Multipliers and Multipliers-Accumulators With Min-Max Approximation Error 30
FPGA Implementation of Gaussian Mixture Model Algorithm for 47fps Segmentation of 1080p Video 30
NORA based TDC in 90 nm CMOS 30
Duration of the High Breakdown Voltage Phase in Deep Depletion SOI LDMOS 30
Processor core for real time background identification of HD video based on OpenCV Gaussian mixture model algorithm 30
Approximate Multipliers Based on New Approximate Compressors 30
Totale 5.065
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Categoria #
all - tutte 48.270
article - articoli 0
book - libri 0
conference - conferenze 0
curatela - curatele 0
other - altro 0
patent - brevetti 0
selected - selezionate 0
volume - volumi 0
Totale 48.270
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Totale Lug Ago Sett Ott Nov Dic Gen Feb Mar Apr Mag Giu
2020/20213 0 0 0 0 0 0 1 0 1 0 1 0
2021/2022882 0 0 0 0 203 9 5 43 13 2 132 475
2022/2023870 185 25 23 33 43 247 0 53 216 4 26 15
2023/2024650 32 54 18 11 9 145 7 8 4 112 52 198
2024/20251.531 2 65 59 36 47 191 108 69 346 62 288 258
2025/20263.218 325 496 1.077 152 874 294 0 0 0 0 0 0
Totale 7.215