NAPOLI, Ettore
 Distribuzione geografica
Continente #
NA - Nord America 4.268
AS - Asia 3.571
EU - Europa 1.284
SA - Sud America 355
AF - Africa 93
OC - Oceania 5
Continente sconosciuto - Info sul continente non disponibili 1
Totale 9.577
Nazione #
US - Stati Uniti d'America 4.168
SG - Singapore 1.675
HK - Hong Kong 942
CN - Cina 367
IE - Irlanda 278
BR - Brasile 257
VN - Vietnam 234
RU - Federazione Russa 223
FR - Francia 217
DE - Germania 202
IT - Italia 163
IN - India 61
GB - Regno Unito 45
CA - Canada 40
AR - Argentina 39
BD - Bangladesh 39
JP - Giappone 36
MX - Messico 35
IQ - Iraq 29
ZA - Sudafrica 28
FI - Finlandia 22
ES - Italia 20
PK - Pakistan 20
TR - Turchia 20
PL - Polonia 19
SE - Svezia 17
NL - Olanda 16
UA - Ucraina 16
CO - Colombia 15
PH - Filippine 15
ID - Indonesia 14
IR - Iran 14
KR - Corea 14
KE - Kenya 13
SA - Arabia Saudita 12
AZ - Azerbaigian 11
UZ - Uzbekistan 10
AE - Emirati Arabi Uniti 8
DZ - Algeria 8
JM - Giamaica 8
MA - Marocco 8
NP - Nepal 8
PY - Paraguay 8
SI - Slovenia 8
TN - Tunisia 8
EC - Ecuador 7
UY - Uruguay 7
VE - Venezuela 7
AT - Austria 6
CL - Cile 6
GR - Grecia 6
JO - Giordania 6
BO - Bolivia 5
ET - Etiopia 5
AU - Australia 4
CR - Costa Rica 4
DO - Repubblica Dominicana 4
EG - Egitto 4
IL - Israele 4
LT - Lituania 4
MY - Malesia 4
PE - Perù 4
SN - Senegal 4
CG - Congo 3
KW - Kuwait 3
LB - Libano 3
NO - Norvegia 3
OM - Oman 3
BE - Belgio 2
BY - Bielorussia 2
CH - Svizzera 2
EE - Estonia 2
GA - Gabon 2
HU - Ungheria 2
KG - Kirghizistan 2
LK - Sri Lanka 2
LY - Libia 2
MK - Macedonia 2
MM - Myanmar 2
RO - Romania 2
TH - Thailandia 2
TL - Timor Orientale 2
TT - Trinidad e Tobago 2
AL - Albania 1
AM - Armenia 1
BG - Bulgaria 1
BJ - Benin 1
CI - Costa d'Avorio 1
CW - ???statistics.table.value.countryCode.CW??? 1
CZ - Repubblica Ceca 1
GE - Georgia 1
HN - Honduras 1
KZ - Kazakistan 1
LC - Santa Lucia 1
MD - Moldavia 1
ML - Mali 1
MN - Mongolia 1
MZ - Mozambico 1
NC - Nuova Caledonia 1
NE - Niger 1
Totale 9.563
Città #
Hong Kong 936
San Jose 770
Singapore 695
Princeton 648
Dallas 572
Dublin 277
Ashburn 265
Chandler 211
The Dalles 197
Council Bluffs 195
Lauterbourg 161
Los Angeles 150
Munich 150
Moscow 123
Wilmington 96
Ho Chi Minh City 87
Santa Clara 67
Beijing 60
Hanoi 60
New York 50
Columbus 47
Norwalk 39
Tokyo 30
Frankfurt am Main 27
São Paulo 27
Ann Arbor 23
Prad am Stilfser Joch 23
Guangzhou 22
San Francisco 21
Chicago 18
Johannesburg 18
Montreal 18
Milan 17
Stockholm 16
Woodbridge 16
Baghdad 14
Charlotte 14
Atlanta 13
Warsaw 13
Boston 12
Brooklyn 12
Haiphong 12
Shanghai 12
Amsterdam 11
Chennai 11
Denver 11
Nairobi 11
Naples 11
Nuremberg 11
Baku 10
Da Nang 10
Fisciano 10
Fort Worth 10
Seattle 9
Tashkent 9
Turku 9
Belo Horizonte 8
Ljubljana 8
London 8
Manchester 8
Ankara 7
Curitiba 7
Mexico City 7
Orem 7
Paris 7
Pittsburgh 7
Riyadh 7
Salerno 7
City of London 6
Erbil 6
Helsinki 6
Jacksonville 6
Lappeenranta 6
Livorno 6
Manaus 6
Prineville 6
Tehran 6
Wuhan 6
Amman 5
Bengaluru 5
Biên Hòa 5
Campinas 5
Dalian 5
Des Moines 5
Dhaka 5
Guarulhos 5
Ha Long 5
Houston 5
Hyderabad 5
Istanbul 5
Kingston 5
Phoenix 5
Rio de Janeiro 5
Springfield 5
Tampa 5
Toronto 5
Vancouver 5
Buenos Aires 4
Bắc Ninh 4
Caracas 4
Totale 6.622
Nome #
FPGA implementation of the CCSDS-123.0-B-1 lossless Hyperspectral Image compression algorithm prediction stage 418
Towards the Design of a Real-Time Processing System for Forcecardiography Signals 297
Approximate Full-Adders: A Comprehensive Analysis 204
Approximate Multipliers Using Static Segmentation: Error Analysis and Improvements 202
Memory analysis of Interest Point Detector and Compact Descriptor algorithms 134
A Novel Approximate Multiplier Based on Improved Logarithmic and Antilogarithmic Conversions 123
A Context-Aware Multimedia Recommender System for activities planning in mobile environments 108
A 3.3 GHz Spread-Spectrum Clock Generator Supporting Discontinuous Frequency Modulations in 28 nm CMOS 103
Analytical modeling of breakdown voltage of superjunction power devices 95
A Binary Line Buffer Circuit Featuring Lossy Data Compression at Fixed Maximum Data Rate 95
1300 V, 2 ms pulse inductive load switching test circuit with 20 ns selectable crowbar intervention 94
A New Global Optimization Algorithm and Its Application to MOSFET Model Parameter Extraction 91
A 1.45 GHz All-Digital Spread Spectrum Clock Generator in 65nm CMOS for Synchronization Free SoC Applications 84
3D electro-thermal simulations of wide area power devices operating in avalanche condition 83
A compact model for thin SOI LIGBTs: description, experimental verification and system application 81
A Fast and Area Efficient Complementary pass-transistor logic carry-skip adder 81
A high-speed sense-amplifier based flip-flop 78
A Dynamic Electro-thermal Model for Power PiN diode 76
A complete system to generate electrical noise with arbitrary power spectral density 73
A Novel Truncated Squarer with Linear Compensation Function 70
A Novel Module-Sign Low-Power Implementation for the DLMS Adaptive Filter With Low Steady-State Error 69
A novel UIS test system with Crowbar feedback for reduced failure energy in power devices testing 69
A Frequency Domain Processor for Real-Time CDVS Keypoints Extraction 68
A novel time-domain processor for real time SAR operation 68
Hardware implementation of a spatio-temporal average filter for real-time denoising of fluoroscopic images 68
On-Chip Spike Detection and Classification using Neural Networks and Approximate Computing 67
A novel high-speed sense-amplifier-based flip-flop 63
Comparative analysis of differential colpitts and cross-coupled VCOs in 180 nm Si-Ge HBT technology 59
A New Algorithm for the Automatic Generation of Fuzzy Rules 59
Impact of Donor Traps on the 2DEG and Electrical Behavior of AlGaN/GaN MISFETs 59
High Speed Speculative Multipliers Based on Speculative Carry-Save Tree 57
Minimizing Coefficients Wordlength for Piecewise-Polynomial Hardware Function Evaluation With Exact or Faithful Rounding 55
Variable Latency Speculative Han-Carlson Adder 55
Design and implementation of a pre processing circuit for band-pass signals acquisition 55
Design of Power/Analog/Digital Systems through Mixed-level simulations 54
Novel VLSI architecture for real time operations of one-bit coded synthetic radar imaging data 54
METHOD AND APPARATUS FOR COMPUTING IMAGE PYRAMIDS AND RELATED COMPUTER PROGRAM PRODUCT 54
Programmable power spectral density noise source 52
On the design and the efficiency of coupled step-up dc-dc converters 52
Power Superjunction Devices : an Analytic Model for Breakdown Voltage 52
FPGA-based architecture for real time segmentation and denoising of HD video 52
Substrate Engineering for Improved Transient Breakdown Voltage in SOI Lateral Power MOS 52
CFPM: Run-time Configurable Floating-Point Multiplier 51
Digital Circuit for Seamless Resampling ADC Output Streams 51
Bidimensional lifetime control for high speed low-loss PiN rectifiers 51
Physics, limits and application of the newly proposed deep depletion SOI power devices 51
Modelling and Implementation of an Accumulator-based ADPLL on a Virtex-5 50
The Effect of Charge Imbalance on Superjunction Power Devices: An Exact Analytical Solution 50
Truncated Binary Multipliers with Variable Correction and Minimum Mean Square Error 50
Analysis and comparison of Direct Digital Frequency Synthesizers implemented on FPGA 49
Analysis of Power Dissipation in Double Edge Triggered Flip-Flops 49
High-speed Direct Digital Frequency Synthesizers in 0.25-um CMOS 49
Design criteria for PiN diode using multiple He ion implantation for local lifetime control 49
Utilizing arbitrary waveform generators to produce noise with imposed spectral characteristics 49
Design of IGBT with Integral Freewheeling Diode 49
Comprehensive Analysis of Input Order Invariant Approximate 4-2 Compressors for Binary Multipliers 48
On the design and the control of a coupled-inductors boost dc-ac converter for an individual PV panel 48
A VLSI processor for light-weight real-time SAR imaging using signum coded signal and time domain processing 48
Noise with colored power spectrum derived from a single bit white noise input 48
Progetto di sistemi elettronici digitali basati su dispositivi FPGA 48
Design of a normally-off diamond JFET for high power integrated applications 48
A Standard-Cell-Based All-Digital PWM Modulator With High Resolution and Spread-Spectrum Capability 48
Digital Circuit for the Arbitrary Selection of Sample Rate in Digital Storage Oscilloscopes 48
A Reconfigurable 2D Convolver for Real-Time SAR Imaging 47
New clock gating techniques for low power flip-flops 47
Power rectifier model including self heating effects 47
Effect of the Collector Design on the IGBT Avalanche Ruggedness: A Comparative Analysis between Punch-Through and Field-Stop Devices 47
Towards a frequency domain processor for real-time SIFT-based filtering 47
FPGA implementation of OpenCV compatible background identification circuit 46
An FPGA processor for real-time, fixed-point refinement of CDVS keypoints 46
Single Flip-flop Driving Circuit for glitch-free NAND-based Digitally Controlled Delay-Lines 46
Real-Time Downsampling in Digital Storage Oscilloscopes with Multichannel Architectures 46
Experimental Detection and Numerical Validation of Different Failure Mechanisms in IGBTs During Unclamped Inductive Switching 46
Design consideration of 1000V Merged PiN Schottky diode using Superjunction sustaining layer 45
Direct Digital Frequency Synthesizers using First-Order Polynomial Chebyshev Approximation 45
Power Dissipation in One-latch and Two-latch Double Edge Triggered Flip-Flops 45
Low-power Implementation of LMS Adaptive Filters Using Scalable Rounding 45
ASIC and FPGA implementation of the Gaussian Mixture Model algorithm for real-time segmentation of High Definition video 45
Approximate adder with output correction for error tolerant applications and Gaussian distributed inputs 45
Modeling Turn-off Voltage rise in SOI LIGBT 45
Study of a failure mechanism during UIS switching of planar PT-IGBT with current sense cell 45
A SISO register circuit tailored for input data with low transition probability 45
OpenCV compatible real time processor for background foreground identification 44
Complete Isothermal Model for the Lateral Insulated Gate Bipolar Transistor on SOI technology 44
Synthesis and generation of critical waveforms by means of AWG 44
Quality-Scalable Approximate LMS Filter 44
Modeling the Duration of the High Breakdown Voltage Phase in Deep Depletion Power Devices 44
FPGA Implementation of Gaussian Mixture Model Algorithm for 47fps Segmentation of 1080p Video 44
Duration of the High Breakdown Voltage Phase in Deep Depletion SOI LDMOS 44
Algorithm for Automatic Generation of Fuzzy Rules applied to power system controllers 44
Two-Dimensional Modeling of On State Voltage Drop in IGBT 43
DEEP DEPLETION SOI POWER DEVICES 43
Improved PiN Diode Circuit Model with Automatic Parameter Extraction Technique 43
Direct digital frequency synthesizers with polynomial hyperfolding technique 43
Numerical Analysis of Local Lifetime control for High-speed low-loss PiN diode design 43
An FPGA-Oriented Algorithm for Real-Time Filtering of Poisson Noise in Video Streams, with Application to X-Ray Fluoroscopy 43
Approximate Multipliers Based on New Approximate Compressors 43
Design of Fixed-Width Multipliers with Linear Compensation Function 43
A VLSI architecture for real time processing of one-bit coded SAR signals 43
Truncated Squarer with Minimum Mean-Square Error 43
Totale 6.567
Categoria #
all - tutte 53.520
article - articoli 0
book - libri 0
conference - conferenze 0
curatela - curatele 0
other - altro 0
patent - brevetti 0
selected - selezionate 0
volume - volumi 0
Totale 53.520


Totale Lug Ago Sett Ott Nov Dic Gen Feb Mar Apr Mag Giu
2020/20211 0 0 0 0 0 0 0 0 0 0 1 0
2021/2022882 0 0 0 0 203 9 5 43 13 2 132 475
2022/2023870 185 25 23 33 43 247 0 53 216 4 26 15
2023/2024650 32 54 18 11 9 145 7 8 4 112 52 198
2024/20251.531 2 65 59 36 47 191 108 69 346 62 288 258
2025/20265.786 325 496 1.077 152 874 296 1.314 196 224 755 77 0
Totale 9.783